GMS81C50 Datasheet, PDF (74/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS

HYUNDAI
GMS81C50 Series
14.3 STANDBY MODE RELEASE
Release of STANDBY mode is executed by RESET input
and Interrupt signal. Register value is defined when Reset.
When there is a release signal of STOP mode (Interrupt,
RESET input), the instruction execution starts after stabi-
lization oscillation time is set by value of BTS2 ~ BTS0
and set ENPCK to ``1``.
Release Signal
RESET
KSCN (key input)
INT1 , INT2
B.I.T
SLEEP
O
O
O
O
Table 14-1 Standby Mode Register
STOP
O
O
O
X
Release Factor
RESET
KSCN
(key input)
INT1
INT2
Basic Interval Timer
(IFBIT)
Release Method
By RESET Pin = Low level, Standby mode is release and system is initialized
Standby mode is released by low input of selected pin by key scan Input
(SMRR0, SMRR1) In case of interrupt mask enable flag = ``0``,
program executes just after standby instruction,
if flag = ``1``, enters each interrupt service routine.
When external interrupt (INT1, INT2) enable flag is ``1``, standby mode is released
at the rising edge of each terminal. When Standby mode is released at interrupt.
Mask Enable flag = ``0``, program executes from the next instruction of standby
instruction. When ``1``, enters each interrupt service routine.
When B.I.T is executed only by bit10 of prescaler (PS10), SLEEP mode can be
release. Interrupt release SLEEP mode, when BIT interrupt enable flag is ``1``.
When standby mode is released at interrupt. Mask enable flag = ``0``,
program executes from the next instruction of SLEEP instruction.
When ``1``, enters each interrupt service routine.
Table 14-2 Standby Mode Release
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