GMS81C50 Datasheet, PDF (30/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS

HYUNDAI
GMS81C50 Series
8.3 Data Memory
Figure 8-8 shows the internal Data Memory space availa-
ble. Data Memory is divided into 3 groups, a user RAM,
control registers, Stack.
0000H
00BFH
00C0H
00FFH
0100H
RAM
(192 Bytes)
CONTROL
REGISTERS
RAM (STACK)
(256 Bytes)
PAGE0
PAGE1
01FFH
Figure 8-8 Data Memory Map
User Memory
The GMS81C50 Series has 448 × 8 bits for the user mem-
ory (RAM).
Control Registers
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
digital converters and I/O ports. The control registers are in
address range of 0C0_H to 0FF_H.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
More detailed informations of each register are explained
in each peripheral section.
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction.
Example; To write at CKCTLR
LDM CLCTLR,#09H ;Divide ratio ÷8
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-3 on page 22.
Address
00C0h
00C1h
00C2h
00C3h
00C4h
00C5h
00C6h
Function Register
PORT R0 DATA REG.
PORT R0 DATA DIRECTION REG.
PORT R1 DATA REG.
PORT R1 DATA DIRECTION REG.
PORT R2 DATA REG.
PORT R2 DATA DIRECTION REG.
reserved
Read
Write
R/W
W
R/W
W
R/W
W
Symbol
R0
R0DD
R1
R1DD
R2
R2DD
RESET Value
undefined
00000000b
undefined
00000000b
undefined
00000000b
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