GMS81C50 Datasheet, PDF (43/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS

GMS81C50 Series
HYUNDAI
fex (MHz)
ps 0
ps 1
ps 2
ps 3
ps 4
ps 5
ps 6
ps 7
ps 8
ps 9
ps 10
ps 11
ps 12
4 MHz
frequency
period
4 MHz
2 MHz
1 MHz
500 KHz
250 KHz
125 KHz
62.5 KHz
31.25 KHz
15.63 KHz
7.183 KHz
3.906 KHz
1.953 KHz
0.976 KHz
250 ns
500 ns
1 us
2 us
4 us
8 us
16 us
32 us
64 us
128 us
256 us
512 us
1024 us
2 MHz
frequency
period
2 MHz
1 MHz
500 KHz
250 KHz
125 KHz
62.5 KHz
31.25 KHz
15.63 KHz
7.183 KHz
3.906 KHz
1.953 KHz
0.976 KHz
0.488 KHz
500 ns
1 us
2 us
4 us
8 us
16 us
32 us
64 us
128 us
256 us
512 us
1024 us
2048 us
Table 10-1 ps output period
Clock to peripheral hardware can be stopped by bit4 (EN-
PCK) of CKCTLR Register. ENPCK is set to ``1`` in reset
state.
7
CKCTLR
-
Clock Control Register
0
-
WDTON ENPCK BTCL
BTS2
BTS1
BTS0
W <00C7 h>
ENPCK
0
1
Periphral clock
stopped
provided
Figure 10-3 Clock Control Register
40