GMS81C50 Datasheet, PDF (79/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS

GMS81C50 Series
Note: Notice ; When Power On Reset, oscillator stabiliza-
tion time doesn`t include OSC. Start time.
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Figure 16-3 Oscillator stabilization diagram
RESET
INTERNAL
RESET
ADDR. BUS
INTERNAL
DATA BUS
SP SP-1
SP-2
FFFE FFFF NEW PC
FE LSB MSB
VECTOR VECTOR
Figure 16-4 Reset Timing by Diagram
16.3 Low Voltage Detection Mode
(1) Low voltage detection condition
An on board voltage comparator checks that VDD is at the
required level to ensure correct operation of the device. If
VDD is below a certain level, Low voltage detector forces
the device into low voltage detection mode.
(2) Low Voltage Detection Mode
There is no power consumption except stop current, stop
mode release function is disabled. All I/O port is config-
ured as input mode and Data memory is retained until volt-
age through external capacitor is worn out. In this mode,
all port can be selected with Pull-up resistor by Mask op-
tion. If there is no information on the Mask option sheet
,the default pull up option (all port connect to pull-up resis-
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