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GMS81C50 Datasheet, PDF (34/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS
HYUNDAI
GMS81C50 Series
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
Example; Addressing accesses the address 0135H regard-
less of G-flag and RPR.
983501 INC !0135H
;A ←ROM[135H]
135H
data
~~
0F100H
98
0F101H
35
0F102H
01
˜
~~ —
data+1 → data
–
address: 0135
X indexed direct page, auto increment→ {X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
LDA, STA
Example; G=0, X=35H
DB
LDA {X}+
35H
data
~~
DB
—
~~
data → A
– 36H → X
(5) Indexed Addressing
X indexed direct page (no offset) → {X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15H, G=1, RPR=01H
D4
LDA {X}
;ACC←RAM[X].
115H
data
~~
0E550H
D4
—
~~
–
data → A
X indexed direct page (8 bit offset) → dp+X
This address value is the second byte (Operand) of com-
mand plus the data of -register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
Example; G=0, X=0F5H
C645 LDA 45H+X
3AH
data
~~
0E550H
C6
0E551H
45
~~
–
˜
— data → A
45H+0F5H=13AH
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