HDM8515 Datasheet, PDF (60/75 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

27
N Divider Ratio
It defines a reference divider with a divider ratio N. The default value is
01h
28
Charge pump bias current control vector
Bits [3:0]. The default value is 1.
29
DiSEqC message frame byte
It defines the format of frame in DiSEqC message
2A
DiSEqC message address byte
It defines the format of slave address in DiSEqC message
2B
DiSEqC message command byte
It defines the format of command in DiSEqC message.
2C, 2D, 2E, 2F, 30 DiSEqC message data byte(s)
For some DiSEqC message, additional data is carried in one or more
subsequent data byte(s).
31
DiSEqC Mode Control
Bit 0. DiSEqC By-pass
When this bit is set to 1, the function of DiSEqC interface is disabled.
When this bit is set to 0, DiSEqC interface is enabled, The default is 1.
Bits [3:1] DiSEqC mode
It determines one of following DiSEqC modes.
0: 22KHz off
1: 22KHz on continuous
2: Burst mode - on for 12.5ms =’0’
3: Burst mode - modulated 1:2 for 12.5ms =’1’
4: Modulated with bytes from DiSEqC instruction.
5-7: Reserved
Bits [7:4] DiSEqC message length
Number of byte in DiSEqC instruction, to output on DISEQC pin.
60