HDM8515 Datasheet, PDF (15/75 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

Table 9: Motorola Read Cycle Timing Parameters (Busmode =0)
Symbol
tsu1
tsu2
td1
th1
th2
th3
Parameter
Setup Time of R/W with respect to /CE Active
Address Setup with respect to /DS Active
Delay from DTACK Active to Data Valid
R/W Hold with respect to /DS Inactive
Address Hold with respect to /DS Inactive
Data Hold with respect to /DS Inactive
Min.
Max.
Unit
5
-
ns
5
-
ns
-
30
ns
5
-
ns
5
-
ns
10
-
ns
HI_ADDR[4:0]
/CE
/DS
R/W
DTACK
HI_DATA[7:0]
Valid
t_su2
t_h2
t_su1
t_h1
t_d1
t_h3
FIGURE 7: MOTOROLA READ TIMING DIAGRAM
Note: External pull-up resistor is required on DTACK.
#This page is only for HDM8515P.
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