HDM8515 Datasheet, PDF (32/75 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

vc[1:0]
00
01
10
11
p[1:0]
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Output Clock Frequency
min
max
40MHz
100MHz
20MHz
10MHz
50MHz
25MHz
5MHz
12.5MHz
60MHz
30MHz
100MHz
50MHz
15MHz
7.5MHz
25MHz
12.5MHz
80MHz
40MHz
100MHz
50MHz
20MHz
10MHz
25MHz
12.5MHz
100MHz
50MHz
25MHz
100MHz
50MHz
25MHz
12.5MHz
12.5MHz
2.2 lfm value setting
According to the table, determine the lfm value
lfm
(Reference Frequency)/(Reference Divisor)/15
7
Less than 0.01555
0
Less than 0.0258
1
Less than 0.0421
2
Less than 0.070
3
Less than 0.114
4
Less than 0.187
5
Less than 0.309
6
Greater than 0.309
2.3 icp value setting
According to the lfm value, you determine zero value, pole value, rlf value.
lfm
Zero value
Pole value
rlf value
7
External filter used
External filter used
External filter used
0
0.008
0.03
40
1
0.013
0.050
24.1
2
0.021
0.082
40
3
0.032
0.135
24.1
4
0.060
0.221
24.1
5
0.100
0.360
14.7
6
0.160
0.600
8.9
Step 1: According to the following formula, Kvcop is determined
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