HMT351U6AFR8C-G7 Datasheet, PDF (19/47 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT351U6AFR8C
HMT351U7AFR8C
6.2.3 Differential Input Cross Point Voltage
To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each
cross point voltage of differential input signals (CK, CK# and DQS, DQS#) must meet the requirements in Table 6.2.3
The differential input cross point voltage VIX is measured from the actual cross point of true and complement signal to
the midlevel between of VDD and VSS.
VDD
CK#, DQS#
V_IX
V_IX
V_IX
< Figure 6.2.3 Vix Definition >
VDD/2
CK, DQS
VSS
Symbol
Parameter
DDR3-1066, DDR3-1333
Min
Max
Unit Notes
Differential Input Cross Point
V_IX
Voltage relative to VDD/2
- 150
+ 150
mV
< Table 6.2.3: Cross point voltage for differential input signals (CK, DQS) >
Rev. 0.02 / Apr 2009
19