HMT351U6AFR8C-G7 Datasheet, PDF (11/47 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT351U6AFR8C
HMT351U7AFR8C
Front Side(left 1–60) Back Side(right 121–180) Front Side(left 61–120) Back Side(right 181–240)
Pin x64
x72 Pin x64
x72
# Non-ECC ECC # Non-ECC ECC
Pin x64
x72 Pin x64
x72
# Non-ECC ECC # Non-ECC ECC
48 NC
NC 168 Reset
Reset
108 DQ56
DQ56 228 DQ61
DQ61
KEY
KEY
109 DQ57
DQ57 229
VSS
VSS
49 NC
NC 169 CKE1/NC CKE1/NC 110 VSS
VSS 230 DM7
DM7
50 CKE0
CKE0 170 VDD
VDD
111 DQS7
DQS7 231
NC
NC
51 VDD
VDD 171
NC
NC
112 DQS7
DQS7 232
VSS
VSS
52 BA2
BA2 172 NC
NC
113
VSS
VSS 233 DQ62
DQ62
53 NC
NC 173 VDD
VDD
114 DQ58
DQ58 234 DQ63
DQ63
54 VDD
VDD 174 A12
A12
115 DQ59
DQ59 235
VSS
VSS
55
All
All 175 A9
A9
116
VSS
VSS
236 VDDSPD
VDDSPD
56
A7²
A7^{2 176}
VDD
VDD
117 SA0
SA0 237 SA1
SA1
57 VDD
VDD 177
A8²
A8²
118 SCL
SCL 238 SDA
SDA
58
A5²
A5^{2 178}
A6²
A6²
119 SA2
SA2 239
VSS
VSS
59
A4²
A4^{2 179}
VDD
VDD
120
VTT
VTT 240
VTT
VTT
60 VDD
VDD 180
A3²
A3²
NC = No Connect; RFU = Reserved Future Use
1. NC pins should not be connected to anything on the DIMM, including bussing within the NC group.
2. Address pins A3–A8 and BA0 and BA1 can be mirrored or not mirrored. Please refer to Section 4.1 for more
information on mirrored addresses.
Rev. 0.02 / Apr 2009
11