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HD66108 Datasheet, PDF (6/60 Pages) Hitachi Semiconductor – (RAM-Provided 165-Channel LCD Driver for Liquid Crystal Dot Matrix Graphics)
Pin Description
HD66108
Classification No. of Pins Symbol
I/O No.of Pins
Power
supply
8, 9, 35, 36 V –V CC1 CC4
—4
12 to 14
GND1–GND3 — 3
1, 43
V , V EE1 EE2
—2
2, 7
37, 42
4, 5
6, 39, 38
3, 40, 41
CPU interface 23
V6L, V1L,
— 12
V1R, V6R,
V4, V3,
VMH1–VMH3,
VML1–VML3
&6
I1
25
26
24
27 to 34
:5
5'
RS
DB7–DB0
LCD driving
output
44 to 208
X164–X0
I1
I1
I1
I/O 8
O 165
LCD interface 21
FLM
I/O 1
20
CL1
I/O 1
22
M
I/O 1
Function
Connect these pins to VCC.
Ground these pins.
These pins supply power to the LCD
driving circuits and should usually be set
to the V6 level.
Apply an LCD driving voltage V1 to V6 to
these pins.
Input a chip select signal via this pin.
A CPU can access the HD66108T’s
internal registers only while the &6 signal
is low.
Input a write enable signal via this pin.
Input a read enable signal via this pin.
Input a register select signal via this pin.
Data is transferred between the
HD66108T and a CPU via these pins.
These pins output LCD driving signals.
The X0–X31 and X100–X164 pins are
column/row common pins and output row
driving signals when so programmed.
X32–X99 pins are column pins.
This pin outputs a first line marker when
the HD66108T is a master chip and
inputs the signal when the chip is a slave
chip.
This pin outputs latch clock pulses of
display data when the chip is a master
chip and inputs clock CL1 pulses when
the chip is a slave chip.
This pin outputs or inputs an M signal,
which converts LCD driving outputs to
AC; it outputs the signal when the
HD66108T is a master chip and inputs
the signal when the chip is a slave chip.
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