HD66108 Datasheet, PDF (50/60 Pages) Hitachi Semiconductor – (RAM-Provided 165-Channel LCD Driver for Liquid Crystal Dot Matrix Graphics)

HD66108
(2) The Status of Registers during Reset
The #$% signal has no effect on registers or register bits except for the address register’s STBY bit
and the X and Y address registers, which are reset to 0’s by the signal. Table 8 shows the reset status
of registers.
(3) Status after Reset
The display memory does not preserve data which has been written to it before reset; it must be set
again after reset.
A #$% signal terminates the standby mode.
Table 8 The Status of Registers during Reset
Register
Address register
X address register
Y address register
Control register
Mode register
C select register
Display memory
Status
Pre-reset status with the STBY bit reset to 0
Reset to 0’s
Reset to 0’s
Pre-reset status
Pre-reset status
Pre-reset status
Preserves no pre-reset data
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