HD66108 Datasheet, PDF (26/60 Pages) Hitachi Semiconductor – (RAM-Provided 165-Channel LCD Driver for Liquid Crystal Dot Matrix Graphics)

HD66108
4.2 Row Output Data Setting
If certain LCD driving output pins are assigned to row output, data must be written to display memory for
row output. The specific area to which this data must be written depends on the row-output mode and the
procedure of writing row data to the display memory (0 or 1 to which bits?) depends on which X pin
drives which line of the LCD. Row data area is determined by the control register’s (FCR) ROS and
DUTY bits and is identical to the protected area, which will be described below. (165-column-output
mode has no protected area, thus requiring no row data to be written (Figure 15).)
Procedure of writing row data to the display memory is as follows. First, 1 must be written to the bit at
the intersection between line Yj and line (column) Xi (column). Line Yj is filled with data to be
displayed on the first line of the LCD and line Xi is connected to pin Xn, which drives the first line of the
LCD. Following this, 0s must be written to the remaining bits on line Yj in the row data area. This rule
applies to subsequent lines on the LCD.
Table 2 shows the relationship between FCR settings and protected areas.
Figure 16 shows the relationship between row data and display. Here the mode is 65-row output from the
right side. Display data on Y0 is displayed on the first line of the LCD and data on Y64 is displayed on
the 65th line of the LCD. If X164 is connected to the first line of the LCD and X100 is connected to the
65th line of the LCD, 1s must be written to the bits on the diagonal line between coordinates (X164, Y0)
and (X100, Y64) and 0s to the remaining bits. Row data protect function must be turned off before
writing row data and be turned on after writing row data. Turning on the row data protect function
disables read/write of display memory area corresponding to the row output pins, i.e., prevents row data
from being destroyed. In Figure 16, display memory area corresponding to pins X100 to X164 is
protected.
Figures 17 to 19 show examples of row data settings. Some multiplexing duty ratios result in invalid
display areas. Although an invalid display area can be read from or written to, it will not be displayed.
Table 2 Relationship between FCR Settings and Protected Areas
Control Register (FCR)
ROS
PON
4
3
Mode
LCD Driving Signal Output Pins Connected to
Protected Area of Display Memory
1
0
0
165-column No area protected
1
0
1
65-row (R)
X100–X164
1
1
0
65-row (L/R) X0–X31 and X132–X164
1
1
1
33-row (R)
X132–X164
65-row (R) : 65-row-output mode from the right side
65-row (L/R): 65-row-output mode from the left and right sides
33-row (R): 33-row-output mode from the right side
Figures
15
16, 19
17
18
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