HD66108 Datasheet, PDF (45/60 Pages) Hitachi Semiconductor – (RAM-Provided 165-Channel LCD Driver for Liquid Crystal Dot Matrix Graphics)

HD66108
2. Display Memory (DRAM) (Accessed with RS = 1, Register Number = (B’000)
Although display memory (Figure 28) is not a register, it can be handled as one. 8- or 6-bit data can be
selected by the control register WLS bit according to the character font in use. If 6-bit data is selected,
D7 and D6 bits are invalid.
3. X Address Register (XAR) (Accessed with RS = 1, Register Number = (B’001)
This register (Figure 29) contains 3 invalid bits (D7 to D5) and 5 valid bits (D4 to D0). It sets X addresses
and confirms X addresses after writing or reading to or from the display memory.
4. Y Address Register (YAR) (Accessed with RS = 1, Register Number = (B’010)
This register (Figure 30) contains 1 invalid bit (D7) and 7 valid bits (D6 to D0). It sets Y addresses and
confirms Y addresses after writing or reading to or from the display memory.
D7 D6 D5 D4 D3 D2 D1 D0
8-bit data
*
*
6-bit data
Reading bits marked with * return 0s and writing them is invalid.
Figure 28 Display Memory
D7 D6 D5 D4 D3 D2 D1 D0
—
XAD
XAD: 0 to 20 (H'00 to H'14) when display data is 8 bits long and
0 to 27 (H'00 to H'1B) when display data is 6 bits long. A
maximum of H'1F is programmable.
Figure 29 X Address Register
D7 D6 D5 D4 D3 D2 D1 D0
—
YAD
YAD: 0 to 64 (H'00 to H'40)
Figure 30 Y Address Register
998