MB85RQ4MLPF-G Datasheet, PDF (4/36 Pages) Fujitsu Component Limited. – 4 M (512 K × 8) Bit Quad SPI

MB85RQ4ML
■ SERIAL PERIPHERAL INTERFACE (SPI)
• SPI
MB85RQ4ML works as a slave of SPI. SPI uses the SI serial input pin to write op-code, addresses or data
to the device on the rising edge of SCK. The SO serial output pin is used to read data or status register
from the device on the falling edge of SCK.
• Quad SPI
MB85RQ4ML works as a slave of Quad SPI. MB85RQ4ML supports Quad SPI mode using the “FRQO”,
“FRQAD”, “WQD” and “WQAD” commands, QPI mode using the “EQPI” and “DQPI” commands and XIP
mode. When using Quad SPI mode instructions, the SI, SO, WP and HOLD pins become bidirectional IO0,
IO1, IO2 and IO3 pins.
■ STATUS REGISTER
Bit No.
Bit Name
7
WPEN
6
QPI
5
LC1
4
LC0
3
BP1
2
BP0
1
WEL
0
0
Function
Status Register Write Protect
This is a bit composed of nonvolatile memory (FRAM). WPEN protects
writing to a status register (refer to “■ WRITING PROTECT”) relating with
WP input. Writing with the WRSR command and reading with the RDSR
command are possible.
QPI mode bit
This is a volatile bit and “0” after power-on and defines QPI mode
enabled/disabled.
1 = QPI mode enabled, set by the EQPI command
0 = QPI mode disabled, reset by the DQPI command
The QPI bit cannot be changed with the WRSR command. Reading with
the RDSR command is possible.
LC (Latency Control) mode bit
These are bits composed of nonvolatile memories.
These define number of dummy cycles for the FRQO and FRQAD com-
mands (refer to “■ LC Mode”).
Writing with the WRSR command and reading with the RDSR
command are possible.
Block Protect
These are bits composed of nonvolatile memories. These define size of
write protect block for the WRITE, WQD and WQAD commands (refer to
“■ BLOCK PROTECT”). Writing with the WRSR command and reading
with the RDSR command are possible.
Write Enable Latch
This is a volatile bit and “0” after power-on and indicates FRAM Array and
status register are writable.
1 = writable, set by the WREN command
0 = unwritable, reset by the WRDI command
With the RDSR command, reading is possible but writing is impossible
with the WRSR command.
WEL is reset after the following operations.
After power-on.
After the WRDI command recognition.
At the rising edge of CS after WRSR command recognition.
At the rising edge of CS after WRITE command recognition.
At the rising edge of CS after WQD command recognition.
At the rising edge of CS after WQAD command recognition.
This is a bit fixed to “0”.
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DS501-00043-2v0-E