MC9S12E64CPVE Datasheet, PDF (90/156 Pages) Freescale Semiconductor, Inc – MC9S12E-Family Device User Guide

Device User Guide — 9S12E12^F8^rD^eG^eV1^s/D^cV^a0^l1^e.04^{Semiconductor, Inc.}
Table 2-2 MC9S12E-Family Power and Ground Connection Summary
Mnemonic
Nominal
Voltage
Description
VDD1
VDD2
VSS1
VSS2
2.5 V
0V
Internal power and ground generated by internal regulator. These also
allow an external source to supply the core VDD/VSS voltages and
bypass the internal voltage regulator.
VDDR
VSSR
3.3/5.0 V _{External power and ground, supply to internal voltage regulator.}
0V
To disable voltage regulator attach V_DDR to V_SSR.
VDDX
VSSX
3.3/5.0 V
External power and ground, supply to pin drivers.
0V
VDDA
VSSA
3.3/5.0 V
0V
Operating voltage and ground for the analog-to-digital converter, the
reference for the internal voltage regulator and the digital-to-analog
converters, allows the supply voltage to the A/D to be bypassed
independently.
VRH
3.3/5.0 V Reference voltage high for the ATD converter, and DAC.
VRL
0 V Reference voltage low for the ATD converter.
VDDPLL
VSSPLL
2.5 V
0V
Provides operating voltage and ground for the Phased-Locked Loop.
This allows the supply voltage to the PLL to be bypassed
independently. Internal power and ground generated by internal
regulator.
NOTE:
All VSS pins must be connected together in the application. Because fast signal
transitions place high, short-duration current demands on the power supply, use
bypass capacitors with high-frequency characteristics and place them as close to
the MCU as possible. Bypass requirements depend on MCU pin load.
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