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MC9S12E64CPVE Datasheet, PDF (151/156 Pages) Freescale Semiconductor, Inc – MC9S12E-Family Device User Guide
Freescale SemiconDdevuiccetUoserr,GIunidce.— 9S12E128DGV1/D V01.04
Table C-2 Expanded Bus Timing Characteristics (3.3V Range)
Conditions are VDDX=3.3V+/-10%, Junction Temperature -40°C to +140°C, CLOAD = 50pF
Num C
Rating
Symbol Min
Typ
Max
1
P Frequency of operation (E-clock)
fo
0
16.0
2
P Cycle time
3
D Pulse width, E low
tcyc
PWEL
62.5
30
4
D Pulse width, E high1
PWEH
30
5
D Address delay time
tAD
16
6
D Address valid time to E rise (PWEL–tAD)
tAV
16
7
D Muxed address hold time
tMAH
2
8
D Address hold to data valid
tAHDS
7
9
D Data hold to address
tDHA
2
10
D Read data setup time
tDSR
15
11
D Read data hold time
tDHR
0
12
D Write data delay time
tDDW
15
13
D Write data hold time
tDHW
2
14
D Write data setup time(1) (PWEH–tDDW)
tDSW
15
15
D Address access time(1) (tcyc–tAD–tDSR)
tACCA
29
16
D E high access time(1) (PWEH–tDSR)
tACCE
15
17
D Non-multiplexed address delay time
tNAD
18
D Non-muxed address valid to E rise (PWEL–tNAD)
tNAV
19
D Non-multiplexed address hold time
tNAH
20
D Chip select delay time
tCSD
21
D Chip select access time(1) (tcyc–tCSD–tDSR)
tACCS
22
D Chip select hold time
tCSH
23
D Chip select negated time
tCSN
24
D Read/write delay time
tRWD
14
25
D Read/write valid time to E rise (PWEL–tRWD)
tRWV
16
26
D Read/write hold time
tRWH
2
27
D Low strobe delay time
tLSD
14
28
D Low strobe valid time to E rise (PWEL–tLSD)
tLSV
16
29
D Low strobe hold time
tLSH
2
30
D NOACC strobe delay time
tNOD
14
31
D NOACC valid time to E rise (PWEL–tNOD)
tNOV
16
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
151
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