MC9S12P128_10 Datasheet, PDF (88/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
2.3.41 Port P Input Register (PTIP)
Address 0x0259
7
6
5
4
3
2
R PTIP7
0
PTIP5
PTIP4
PTIP3
PTIP2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
1. Read: Anytime
Figure 2-39. Port P Input Register (PTIP)
Write:Never, writes to this register have no effect.
Access: User read⁽¹⁾
1
PTIP1
0
PTIP0
u
u
Field
7,5-0
PTIP
Table 2-36. PTIP Register Field Descriptions
Description
Port P input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.3.42 Port P Data Direction Register (DDRP)
Address 0x025A
R
W
Reset
7
DDRP7
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
DDRP5
DDRP4
DDRP3
DDRP2
0
0
0
0
0
Figure 2-40. Port P Data Direction Register (DDRP)
Table 2-37. DDRP Register Field Descriptions
Field
7
DDRP
Description
Port P data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
Access: User read/write⁽¹⁾
1
0
DDRP1
DDRP0
0
0
S12P-Family Reference Manual, Rev. 1.13
88
Freescale Semiconductor