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MC9S12P128_10 Datasheet, PDF (437/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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128 KByte Flash Module (S12FTMRC128K1V1)
Table 13-11. FCCOBIX Field Descriptions
Field
Description
2â0
Common Command Register Indexâ The CCOBIX bits are used to select which word of the FCCOB register
CCOBIX[1:0] array is being read or written to. See Section 13.3.2.11, âFlash Common Command Object Register (FCCOB),â
for more details.
13.3.2.4 Flash Reserved0 Register (FRSV0)
This Flash register is reserved for factory testing.
Offset Module Base + 0x000C
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 13-8. Flash Reserved0 Register (FRSV0)
All bits in the FRSV0 register read 0 and are not writable.
13.3.2.5 Flash Conï¬guration Register (FCNFG)
The FCNFG register enables the Flash command complete interrupt and forces ECC faults on Flash array
read access from the CPU.
Offset Module Base + 0x0004
R
W
Reset
7
CCIE
0
6
5
4
3
2
0
0
0
0
IGNSF
0
0
0
0
0
= Unimplemented or Reserved
Figure 13-9. Flash Conï¬guration Register (FCNFG)
1
FDFD
0
0
FSFD
0
CCIE, IGNSF, FDFD, and FSFD bits are readable and writable while remaining bits read 0 and are not
writable.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
437
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