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MC9S12P128_10 Datasheet, PDF (117/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Memory Map Control (S12PMMCV1)
3.5 Implemented Memory in the System Memory Architecture
Each memory can be implemented in its maximum allowed size. But some devices have been deï¬ned for
smaller sizes, which means less implemented pages. All non implemented pages are called unimplemented
areas.
⢠Registers has a ï¬xed size of 1KB, accessible via xbus0.
⢠SRAM has a maximum size of 11KB, accessible via xbus0.
⢠D-Flash has a ï¬xed size of 4KB accessible via xbus0.
⢠P-Flash has a maximum size of 224KB, accessible via xbus0.
⢠NVM resources (IFR) including D-Flash have maximum size of 16KB (PPAGE 0x01).
3.5.0.1 Implemented Memory Map
The global memory spaces reserved for the internal resources (RAM, D-Flash, and P-Flash) are not
determined by the MMC module. Size of the individual internal resources are however ï¬xed in the design
of the device cannot be changed by the user. Please refer to the SoC Guide for further details. Figure 3-11
and Table 3-8 show the memory spaces occupied by the on-chip resources. Please note that the memory
spaces have ï¬xed top addresses.
Table 3-8. Global Implemented Memory Space
Internal Resource
Bottom Address
Registers
0x0_0000
System RAM
RAM_LOW =
0x0_4000 minus RAMSIZE(1)
D-Flash
0x0_4400
P-Flash
PF_LOW =
0x4_0000 minus FLASHSIZE(2)
1. RAMSIZE is the hexadecimal value of RAM SIZE in bytes
2. FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes
Top Address
0x0_03FF
0x0_3FFF
0x0_53FF
0x3_FFFF
In single-chip modes accesses by the CPU12 (except for ï¬rmware commands) to any of the
unimplemented areas (see Figure 3-11) will result in an illegal access reset (system reset). BDM accesses
to the unimplemented areas are allowed but the data will be undeï¬ned.
No misaligned word access from the BDM module will occur; these accesses are blocked in the BDM
module (Refer to BDM Block Guide).
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
117
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