MC9S12P128_10 Datasheet, PDF (80/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
2.3.29 Port S Polarity Select Register (PPSS)
Address 0x024D
7
R
0
W
Reset
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
PPSS3
PPSS2
0
0
0
0
0
Figure 2-27. Port S Polarity Select Register (PPSS)
Access: User read/write⁽¹⁾
1
0
PPSS1
PPSS0
0
0
Table 2-26. PPSS Register Field Descriptions
Field
3-0
PPSS
Description
Port S pull device select—Configure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
1 A pull-down device is selected
0 A pull-up device is selected
2.3.30 Port S Wired-Or Mode Register (WOMS)
Address 0x024E
7
R
0
W
Reset
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
WOMS3
WOMS2
0
0
0
0
0
Figure 2-28. Port S Wired-Or Mode Register (WOMS)
Access: User read/write⁽¹⁾
1
0
WOMS1
WOMS0
0
0
Table 2-27. WOMS Register Field Descriptions
Field
Description
3-0
WOMS
Port S wired-or mode—Enable open-drain functionality on output pin
This bit configures an output pin as wired-or (open-drain) or push-pull. In wired-or mode a logic “0” is driven active
low while a logic “1” remains undriven. This allows a multipoint connection of several serial modules. The bit has no
influence on pins used as input.
1 Output buffer operates as open-drain output.
0 Output buffer operates as push-pull output.
S12P-Family Reference Manual, Rev. 1.13
80
Freescale Semiconductor