MC9328MXL Datasheet, PDF (75/84 Pages) Freescale Semiconductor, Inc – i.MX Integrated Portable System Processor

Specifications
3.19 CMOS Sensor Interface
The CMOS Sensor Interface (CSI) module consists of a control register to configure the interface timing, a control
register for statistic data generation, a status register, interface logic, a 32 × 32 image data receive FIFO, and a
16 × 32 statistic data FIFO.
3.19.1 Gated Clock Mode
Figure 59 shows the timing diagram when the CMOS sensor output data is configured for negative edge and the
CSI is programmed to received data on the positive edge. Figure 60 on page 76 shows the timing diagram when the
CMOS sensor output data is configured for positive edge and the CSI is programmed to received data in negative
edge. The parameters for the timing diagrams are listed in Table 31 on page 76.
1
VSYNC
7
HSYNC
PIXCLK
5
6
2
DATA[7:0]
Valid Data
3
4
Valid Data
Valid Data
Figure 59. Sensor Output Data on Pixel Clock Falling Edge
CSI Latches Data on Pixel Clock Rising Edge
MC9328MXL Advance Information, Rev. 5
Freescale Semiconductor
75