MC9328MXL Datasheet, PDF (17/84 Pages) Freescale Semiconductor, Inc – i.MX Integrated Portable System Processor

3.8 Reset Module
Specifications
The timing relationships of the Reset module with the POR and RESET_IN are shown in Figure 3 and
Figure 4.
NOTE:
Be aware that NVDD must ramp up to at least 1.8V before QVDD is
powered up to prevent forward biasing.
90% AVDD
1
POR
RESET_POR
RESET_DRAM
HRESET
RESET_OUT
CLK32
10% AVDD
2
Exact 300ms
3
7 cycles @ CLK32
4
14 cycles @ CLK32
HCLK
Figure 3. Timing Relationship with POR
MC9328MXL Advance Information, Rev. 5
Freescale Semiconductor
17