MC9328MXL Datasheet, PDF (14/84 Pages) Freescale Semiconductor, Inc – i.MX Integrated Portable System Processor

Specifications
Table 8. 32k/16M Oscillator Signal Timing (Continued)
Parameter
Minimum
RMS
Maximum Unit
EXTAL32k startup time
EXTAL16M input jitter (peak to peak)
EXTAL16M startup time
800
–
–
ms
–
TBD
TBD
–
TBD
–
–
–
3.6 Embedded Trace Macrocell
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
• 32-bit data field
• 7-bit address field
• A read/write bit
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in Figure 2. See Table 9 for the ETM9 timing parameters used
in Figure 2.
TRACECLK
2a
1
3a
2b
3b
TRACECLK
(Half-Rate Clocking Mode)
Output Trace Port
Valid Data
4a
Valid Data
4b
Figure 2. Trace Port Timing Diagram
Table 9. Trace Port Timing Diagram Parameter Table
1.8V ± 0.10V
3.0V ± 0.30V
Ref
No.
Parameter
Minimum
Maximum
Minimum
Maximum
1
CLK frequency
0
85
2a
Clock high time
1.3
–
2b
Clock low time
3
–
0
100
2
–
2
–
Unit
MHz
ns
ns
MC9328MXL Advance Information, Rev. 5
14
Freescale Semiconductor