MC9328MXL Datasheet, PDF (18/84 Pages) Freescale Semiconductor, Inc – i.MX Integrated Portable System Processor

Specifications
5
RESET_IN
HRESET
RESET_OUT
6
14 cycles @ CLK32
4
CLK32
HCLK
Figure 4. Timing Relationship with RESET_IN
Table 11. Reset Module Timing Parameter Table
Ref
No.
Parameter
1.8V ± 0.10V
3.0V ± 0.30V
Unit
Min
Max
Min Max
1 Width of input POWER_ON_RESET
note¹
–
note¹
–
–
2 Width of internal POWER_ON_RESET
(CLK32 at 32 kHz)
300
300
300 300
ms
3 7K to 32K-cycle stretcher for SDRAM reset
7
7
7
7 Cycles of
CLK32
4 14K to 32K-cycle stretcher for internal system reset
14
HRESERT and output reset at pin RESET_OUT
14
14
14 Cycles of
CLK32
5 Width of external hard-reset RESET_IN
4
–
4
– Cycles of
CLK32
6 4K to 32K-cycle qualifier
4
4
4
4 Cycles of
CLK32
1. POR width is dependent on the 32 or 32.768 kHz crystal oscillator start-up time. Design margin should
allow for crystal tolerance, i.MX chip variations, temperature impact, and supply voltage influence.
Through the process of supplying crystals for use with CMOS oscillators, crystal manufacturers have
developed a working knowledge of start-up time of their crystals. Typically, start-up times range from
400 ms to 1.2 seconds for this type of crystal.
If an external stable clock source (already running) is used instead of a crystal, the width of POR should
be ignored in calculating timing for the start-up process.
MC9328MXL Advance Information, Rev. 5
18
Freescale Semiconductor