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K20P144M120SF3 Datasheet, PDF (45/80 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet
Peripheral operating requirements and behaviors
Table 27. 16-bit ADC operating conditions (continued)
Symbol
Crate
Crate
Description
ADC conversion
rate
ADC conversion
rate
Conditions
≤ 13 bit modes
No ADC hardware
averaging
Continuous
conversions enabled,
subsequent conversion
time
16 bit modes
No ADC hardware
averaging
Continuous
conversions enabled,
subsequent conversion
time
Min.
20.000
37.037
Typ.1
Max.
Unit
—
818.330
Ksps
—
461.467
Ksps
Notes
5
5
1. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. DC potential difference.
3. This resistance is external to MCU. The analog source resistance should be kept as low as possible in order to achieve the
best results. The results in this datasheet were derived from a system which has <8 Ω analog source resistance. The RAS/
CAS time constant should be kept to <1ns.
4. To use the maximum ADC conversion clock frequency, the ADHSC bit should be set and the ADLPC bit should be clear.
5. For guidelines and examples of conversion rate calculation, download the ADC calculator tool: http://cache.freescale.com/
files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
ZAS
RAS
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
Pad
leakage
due to
input
protection
ZADIN
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
RADIN
ADC SAR
ENGINE
VADIN
VAS
CAS
INPUT PIN
INPUT PIN
INPUT PIN
RADIN
RADIN
RADIN
CADIN
Figure 18. ADC input impedance equivalency diagram
K20 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
Freescale Semiconductor, Inc.
Preliminary
45