K20P144M120SF3 Datasheet, PDF (24/80 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
Board type Symbol
Single-layer
(1s)
R_θJMA
Four-layer
(2s2p)
R_θJMA
—
R_θJB
—
R_θJC
—
Ψ_JT
Description 144 LQFP
Thermal
36
resistance,
junction to
ambient (200 ft./
min. air speed)
Thermal
30
resistance,
junction to
ambient (200 ft./
min. air speed)
Thermal
24
resistance,
junction to
board
Thermal
9
resistance,
junction to case
Thermal
2
characterization
parameter,
junction to
package top
outside center
(natural
convection)
144
MAPBGA
41
Unit
°C/W
27
°C/W
17
°C/W
10
°C/W
2
°C/W
Notes
1
1
2
3
4
1.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method
Environmental Conditions—Forced Convection (Moving Air).
2.
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
3.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
4.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 12. Debug trace operating behaviors
Symbol
T_cyc
Description
Clock period
Min.
Max.
Frequency dependent
Unit
MHz
Table continues on the next page...
K20 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
24
Preliminary
Freescale Semiconductor, Inc.