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K20P144M120SF3 Datasheet, PDF (16/80 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet
General
• FlexBus clock = 50 MHz
• Flash clock = 25 MHz
Symbol
tPOR
Table 5. Power mode transition operating behaviors
Description
Min.
Max.
Unit
After a POR event, amount of time from the point VDD
—
300
μs
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
• VLLS1 → RUN
—
126
μs
• VLLS2 → RUN
—
82
μs
• VLLS3 → RUN
—
82
μs
• LLS → RUN
—
5.0
μs
• VLPS → RUN
—
TBD
μs
• STOP → RUN
—
TBD
μs
1. Normal boot (FTFE_FOPT[LPBOOT]=1)
Notes
1
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol
IDDA
IDD_RUN
Description
Analog supply current
Run mode current — all peripheral clocks
disabled, code executing from flash
• @ 1.8V
• @ 3.0V
Min.
—
—
—
Typ.
Max.
Unit
—
See note
mA
65
TBD
mA
65
TBD
mA
IDD_RUN
Run mode current — all peripheral clocks
enabled, code executing from flash
• @ 1.8V
• @ 3.0V
—
95
TBD
mA
—
95
TBD
mA
IDD_WAIT Wait mode high frequency current at 3.0 V — all
—
peripheral clocks disabled
IDD_WAIT Wait mode reduced frequency current at 3.0 V
—
— all peripheral clocks disabled
37
TBD
mA
21
TBD
mA
Table continues on the next page...
Notes
1
2
3
2
4
K20 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
16
Preliminary
Freescale Semiconductor, Inc.