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MC68HC11EA9 Datasheet, PDF (42/58 Pages) Motorola, Inc – 8 BIT HCMOS SINGLE CHIP MICROCONTOROLLER WITH A/D CONVERTER
Freescale Semiconductor, Inc.
7.3 Real-Time Interrupt
The real-time interrupt (RTI) function can generate interrupts at different fixed periodic rates. These
rates are a function of the MCU oscillator frequency and the value of the software-accessible control
bits, RTR1 and RTR0. These bits determine the rate at which interrupts are requested by the RTI sys-
tem. The RTI system is driven by an E divided by 213 rate clock compensated so that it is independent
of the timer prescaler. The RTR1 and RTR0 control bits select an additional division factor. RTI is set
to its fastest rate by default out of reset and can be changed at any time.
RTR[1:0]
00
01
10
11
Table 19 Real-Time Interrupt Rates (Period Length)
Period Length
Selected
213 ÷ E
214 ÷ E
215 ÷ E
216 ÷ E
E = 1.0 MHz
8.192 ms
16.384 ms
32.768 ms
65.536 ms
Period Length
E = 2.0 MHz
4.096 ms
8.192 ms
16.384 ms
32.768 ms
E = 3.0 MHz
2.731 ms
5.461 ms
10.923 ms
21.845 ms
RTR[1:0]
00
01
10
11
Table 20 Real-Time Interrupt Rates (Frequency)
Maximum
Frequency Possible
213 ÷ E
214 ÷ E
215 ÷ E
216 ÷ E
Maximum Interrupt Frequency
E = 1.0 MHz
E = 2.0 MHz
E = 3.0 MHz
122.070 Hz
244.141 Hz
366.211 Hz
61.035 Hz
122.070 Hz
183.105 Hz
30.518 Hz
61.035 Hz
91.553 Hz
15.258 Hz
30.518 Hz
45.776 Hz
TFLG2 — Timer Interrupt Flag 2
$1025
BIT 7
6
5
4
3
2
1
BIT 0
TOF
RTIF PAOVF PAIF
—
—
—
—
RESET:
0
0
0
0
0
0
0
0
TOF — Timer Overflow Interrupt Flag
Refer to 7.2 Main Timer
RTIF — Real-Time Interrupt Flag
If RTII enable bit is set, this flag is set and an interrupt is generated periodically at the rate determined
by the real-time interrupt rate (RTR[1:0]) bits in PACTL.
0 = No periodic interrupt has occurred since either the RTIF flag bit was last cleared or the RTII
enable bit was set
1 = A periodic interrupt has occurred
PAOVF — Pulse Accumulator Overflow Interrupt Flag
Refer to 7.4 Pulse Accumulator
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Refer to 7.4 Pulse Accumulator
Bits [3:0] — Not Implemented
Always read zero
MC68HC11EA9
42
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MC68HC11EA9TS/D
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