MC68HC11EA9 Datasheet, PDF (11/58 Pages) Motorola, Inc – 8 BIT HCMOS SINGLE CHIP MICROCONTOROLLER WITH A/D CONVERTER

Freescale Semiconductor, Inc.
4.3 Test Mode
Test mode, a variation of the expanded mode, is primarily used during Freescale's internal production
testing; however, it is accessible for programming the CONFIG register, programming calibration data
into EEPROM, and supporting emulation and debugging during development. Refer to Figure 6.
4.4 Bootstrap Mode
Bootstrap mode is a special variation of the single-chip mode. Bootstrap mode allows special-purpose
programs to be entered into internal RAM. When boot mode is selected at reset, a small bootstrap ROM
becomes present in the memory map. Reset and interrupt vectors are located in this ROM at $BFC0–
$BFFF. The bootstrap ROM contains a small program which initializes the SCI and allows the user to
download a program into on-chip RAM. The size of the downloaded program can be as large as the size
of the on-chip RAM. After a four-character delay, or after receiving the character for the highest address
in RAM, control passes to the loaded program at $0000. Refer to Figure 6.
4.5 Mode Selection
The four mode variations are selected by the logic levels present on the MODA and MODB pins during
reset. The MODA and MODB logic levels determine the logic state of SMOD and the MDA control bits
in the highest priority I-bit interrupt and miscellaneous (HPRIO) register. See Table 2 for further infor-
mation.
After reset is released, the mode select pins no longer influence the MCU operating mode. In single-
chip operating mode, the MODA pin is connected to a logic level zero. In expanded mode, MODA is
normally connected to V_DD through a pull-up resistor of 4.7 kΩ. The MODA pin also functions as the
load instruction register (LIR) pin when the MCU is not in reset. The LIR signal is useful during program
debugging. The open-drain active low LIR output pin drives low during the first E cycle of each instruc-
tion. The MODB pin also functions as standby power input (V_STBY), which allows RAM contents to be
maintained in absence of V_DD.
HPRIO — Highest Priority I-bit Interrupt and Miscellaneous
RESET:
BIT 7
RBOOT*
0
6
SMOD*
0
5
MDA*
0
4
IRVNE
0
3
PSEL3
0
2
PSEL2
0
1
PSEL1
0
BIT 0
PSEL0
0
*The reset values of RBOOT, SMOD, and MDA depend on the mode selected at power up.
$103C
RBOOT — Read Bootstrap ROM/EPROM
Valid only when SMOD is set (bootstrap or special test mode). Can only be written in special modes.
0 = Bootstrap ROM disabled and not in map
1 = Bootstrap ROM enabled and in map at $BF00–$BFFF
SMOD and MDA — Special Mode Select and Mode Select A
These two bits can be read at any time. They can be written anytime in special modes. MDA can only
be written once in normal modes. SMOD cannot be set once it has been cleared.
Table 2 Operating Mode Selection
Inputs
MODA MODB
0
1
1
1
0
0
1
0
Mode
Single Chip
Expanded
Bootstrap
Special Test
Latched at Reset
MDA SMOD
0
0
1
0
0
1
1
1
MC68HC11EA9
MC68HC11EA9TS/D
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