908E621_12 Datasheet, PDF (36/60 Pages) Freescale Semiconductor, Inc – Integrated Quad Half bridge and Triple High Side Embedded MCU and LIN for High End Mirror

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
H0EN — H0 Input 2-pin Hall-effect sensor Enable Bit
This read/write bit enables the 2-pin hall-effect sensor
sense circuitry. Reset clears H0EN bit.
1 = Hall-port H0 is switched on and sensed
0 = Hall-port H0 disabled
H0PD — Hall-port Pull-up Disable Bit
This read/write bit disables the H0 Pull-up resistor. Reset
clears H0PD bit.
1 = Hall-port pull-up resistor on H0 disabled
0 = Hall-port pull-up resistor on H0 enabled
H0MS — H0 Mode Select
These read/write bits select the mode of the H0 input
Reset clears H0MS bit.
1 = H0 is 2-pin hall-sensor input
0 = H0 is general purpose input
Half-bridge Outputs
Outputs HB1:HB4 provide four low-resistive half-bridge
output stages. The half-bridges can be used in H-bridge, high
side or low side configurations.
Reset clears all bits in the H-bridge Output Register
(HBOUT) owing to the fact that all half-bridge outputs are
switched off.
HB1:HB4 output features
• Short-circuit (over-current) protection on high side and
low side MOSFETs
• Current recopy feature (low side MOSFET)
• Over-temperature protection
• Over-voltage and under-voltage protection
• Active clamp on low side MOSFET
VSUP
On/Off
Status
PWM
High Side Driver
Charge Pump
Over-temperature Protection
Over-current Protection
Control
HBx
On/Off
Status
PWM
Low Side Driver
Current Recopy
Current Limitation
Active Clamp
Over-current Protection
GND
Figure 22. Half-bridge Push-Pull Output Driver
Half-bridge Control
Each output MOSFET can be controlled individually. The
general enable of the circuitry is done by setting PSON in the
System Control Register (SYSCTL). The HBx_L and HBx_H
bits form one half-bridge. It is not possible to switch on both
MOSFETs in one half-bridge at the same time. If both bits are
set, the high side MOSFET is in PWM mode.
To avoid both MOSFETs (high side and low side) of one
half-bridge being on at the same time, a break-before-make
circuit exists. Switching the high side MOSFET on is inhibited
as long as the potential between gate and V_SS is not below a
certain threshold. Switching the low side MOSFET on is
blocked as long as the potential between gate and source of
the high side MOSFET did not fall below a certain threshold.
908E621
36
Analog Integrated Circuit Device Data
Freescale Semiconductor