908E621_12 Datasheet, PDF (19/60 Pages) Freescale Semiconductor, Inc – Integrated Quad Half bridge and Triple High Side Embedded MCU and LIN for High End Mirror

FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 908E621 was designed and developed as a highly
integrated and cost-effective solution for automotive and
industrial applications. For automotive body electronics, the
908E621 is well suited to perform complete mirror control via
a three wire LIN bus.
This device combines an HC908EY16 MCU core with
flash memory together with a SMARTMOS IC chip. The
SMARTMOS IC chip combines power and control in one
chip. Power switches are provided on the SMARTMOS IC
configured as half-bridge outputs and three high side
switches. Other ports are also provided, which include one
Hall-effect sensor input port, one analog input port with a
switched current source, one wake-up pin, and a selectable
HVDD pin. An internal voltage regulator provides power to
the MCU chip.
Also included in this device is a LIN physical layer, which
communicates using a single wire. This enables this device
to be compatible with three wire bus systems, where one wire
is used for communication, one for battery, and one for
ground.
FUNCTIONAL PIN DESCRIPTION
See Figure 2, 908E621 Simplified Internal Block Diagram,
page 2, for a graphic representation of the various pins
referred to in the following paragraphs. Also, see the pin
diagram on page 3 for a depiction of the pin locations on the
package.
PORT A I/O PINS
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU.
PTA0:PTA4 are shared with the keyboard interrupt pins,
KBD0 : KBD4.
The PTA5/SPSCK pin is not accessible in this device and
is internally connected to the SPI clock pin of the analog die.
The PTA6/SS pin is not accessible in this device and is
internally connected to the SPI slave select input of the
analog die.
For details refer to the 68HC908EY16 datasheet.
PORT B I/O PINS
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU. All
pins are shared with the ADC module.
PTB0/AD0 is internally connected to the ADOUT pin of the
analog die, allowing diagnostic measurements to be
calculated (e.g., current recopy, V_SUP, etc.).
The PTB1/AD1, PTB2/AD2, PTB6/AD6/TBCH0, PTB7/
AD7/TBCH1 pins are not accessible in this device.
For details refer to the 68HC908EY16 datasheet.
PORT C I/O PINS
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU. For
example, PTC2:PTC4 are shared with the ICG module.
PTC0/MISO and PTC1/MOSI are not accessible in this
device and are internally connected to the MISO and MOSI
SPI pins of the analog die.
For details refer to the 68HC908EY16 datasheet.
PORT D I/O PINS
PTD0/TACH0/BEMF and PTD1/TACH1 are special
function, bi-directional I/O port pins that can also be
programmed to be timer pins.
PTD0/TACH0 pin is internally connected to the PWM input
of the analog die and only accessible for test purposes (can
not be used in the application).
For details refer to the 68HC908EY16 datasheet.
PORT E I/O PIN
PTE0/TXD and PTE1/RXD are special function,
bidirectional I/O port pins that can also be programmed to be
enhanced serial communication.
PTE0/TXD is internally connected to the TXD pin of the
analog die. The connection for the receiver must be done
externally.
PTE1/RXD is internally connected to the RXD pin of the
analog die and only accessible for test purposes (can not be
used in the application).
For details refer to the 68HC908EY16 datasheet.
EXTERNAL INTERRUPT PIN (IRQ)
The IRQ pin is an asynchronous external interrupt pin. This
pin contains an internal pull-up resistor that is always
activated, even when the IRQ pin is pulled LOW.
For details refer to the 68HC908EY16 datasheet.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E621
19