MC68908GZ8MFJE Datasheet, PDF (227/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

SIM Registers
NOTE
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
Figure 16-18 shows stop mode entry timing. Figure 16-19 shows stop mode recovery time from interrupt.
NOTE
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
CPUSTOP
IAB
STOP ADDR
STOP ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
Note: Previous data can be operand data or the STOP opcode, depending
on the last instruction.
Figure 16-18. Stop Mode Entry Timing
CGMXCLK
STOP RECOVERY PERIOD
INT/BREAK
IAB
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
SP – 2
SP – 3
Figure 16-19. Stop Mode Recovery from Interrupt
16.7 SIM Registers
The SIM has three memory-mapped registers. Table 16-4 shows the mapping of these registers.
Table 16-4. SIM Registers
Address
$FE00
$FE01
$FE03
Register
SBSR
SRSR
SBFCR
Access Mode
User
User
User
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Freescale Semiconductor
227