MC68908GZ8MFJE Datasheet, PDF (146/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
Table 12-8. Time Segment Values
TSEG13 TSEG12 TSEG11 TSEG10
Time
Segment 1
TSEG22
0
0
0
0
1 T_q Cycle⁽¹⁾
0
0
0
0
1
2 T_q Cycles⁽¹⁾
0
0
0
1
0
3T_q Cycles⁽¹⁾
.
0
0
1
1
4 T_q Cycles
.
.
.
.
.
.
1
.
.
.
.
.
1
1
1
1
16 T_q Cycles
1. This setting is not valid. Please refer to Table 12-4 for valid settings.
TSEG21
0
0
.
.
1
TSEG20
0
1
.
.
1
Time
Segment 2
1 T_q Cycle⁽¹⁾
2 T_q Cycles
.
.
8T_q Cycles
12.13.5 MSCAN08 Receiver Flag Register (CRFLG)
All bits of this register are read and clear only. A flag can be cleared by writing a 1 to the corresponding
bit position. A flag can be cleared only when the condition which caused the setting is valid no more.
Writing a 0 has no effect on the flag setting. Every flag has an associated interrupt enable flag in the
CRIER register. A hard or soft reset will clear the register.
Address: $0504
Bit 7
6
5
4
3
2
1
Bit 0
Read:
WUPIF RWRNIF TWRNIF RERRIF TERRIF BOFFIF OVRIF
RXF
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 12-20. Receiver Flag Register (CRFLG)
WUPIF — Wakeup Interrupt Flag
If the MSCAN08 detects bus activity while in sleep mode, it sets the WUPIF flag. If not masked, a
wakeup interrupt is pending while this flag is set.
1 = MSCAN08 has detected activity on the bus and requested wakeup.
0 = No wakeup interrupt has occurred.
RWRNIF — Receiver Warning Interrupt Flag
This flag is set when the MSCAN08 goes into warning status due to the receive error counter (REC)
exceeding 96 and neither one of the error interrupt flags or the bus-off interrupt flag is set⁽¹⁾. If not
masked, an error interrupt is pending while this flag is set.
1 = MSCAN08 has gone into receiver warning status.
0 = No receiver warning status has been reached.
1. Condition to set the flag: RWRNIF = (96 → REC) & RERRIF & TERRIF & BOFFIF
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
146
Freescale Semiconductor