F81216AD Datasheet, PDF (38/43 Pages) Feature Integration Technology Inc. – LPC to 4 UART + 9-bit Protocol

F81216AD
Timer Status and Control Register  Index F0h
Bit
Name
7-3 Reserved
2-1 _{WDT_UNIT}
0 _{WDT_EVENT}
R/W Default
-
- Reserved
R/W - _{00 : Timer Unit is 10ms.}
Description
01 : Timer Unit is 1 second
10 : Timer Unit is 1 minute.
11 : reserved.
This register is determined by DTR3#/PS_WDT. The power on default is 0x01
if DTR3#/PS_WDT is pull up. Otherwise, it is 0x00.
R/W 0 _{0 : no time out occur.}
1 : time out has occurred.
Write “1” to this bit will clear the status.
Timer Count Number Register  Index F1h
Bit
Name
7-0 _{WDT_CNT}
R/W Default
Description
R/W - _{The number of count for watchdog timer.}
Write the same non-zero value twice to enable the timer, otherwise will disable
timer.
This register is determined by DTR3#/PS_WDT. The power on default is 0x0A
if DTR3#/PS_WDT is pull up. Otherwise, it is 0x00.
-35-
July, 2008
V0.20P