F81216AD Datasheet, PDF (18/43 Pages) Feature Integration Technology Inc. – LPC to 4 UART + 9-bit Protocol

F81216AD
5.5.1 Start Frame
There are two modes of operation for the SERIRQ Start frame: Quiet mode and Continuous
mode. In the Quiet mode, the peripheral drives the SERIRQ signal active low for one clock, and
then tri-states it. This brings all the states machines of the peripherals from idle to active states.
The host controller will then take over driving SERIRQ signal low in the next clock and will continue
driving the SERIRQ low for programmable 3 to 7 clock periods. This makes the total number of
clocks low for 4 to 8 clock periods. After these clocks, the host controller will drive the SERIRQ high
for one clock and then tri-states it. In the Continuous mode, only the host controller initiates the
START frame to update IRQ/Data line information. The host controller drives the SERIRQ signal
low for 4 to 8 clock periods. Upon a reset, the SERIRQ signal is defaulted to the Continuous mode
for the host controller to initiate the first Start frame.
5.5.2 IRQ/Data Frame
Once the start frame has been initiated, all the peripherals must start counting frames based
on the rising edge of the start pulse. Each IRQ/Data Frame is three clocks: Sample phase,
Recovery phase, and Turn-around phase. During the Sample phase, the peripheral drives SERIRQ
low if the corresponding IRQ is active. If the corresponding IRQ is inactive, then SERIRQ must be
left tri-stated. During the Recovery phase, the peripheral device drives the SERIRQ high. During
the Turn-around phase, the peripheral device left the SERIRQ tri-stated. The IRQ/Data Frame has
a number of specific order, as shown in Table 5-1. The F81216AD is only support IRQ3, IRQ4, IRQ5,
IRQ9, IRQ10, and IRQ11.
Table 5-1 IRQSER Sampling periods
IRQ/Data Frame
1
2
3
Signal Sampled
IRQ0
IRQ1
SMI#
# of clocks past Start
2
5
8
4
IRQ3
11
5
IRQ4
14
6
IRQ5
17
7
IRQ6
20
8
IRQ7
23
9
IRQ8
26
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July, 2008
V0.20P