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F81216AD Datasheet, PDF (29/43 Pages) Feature Integration Technology Inc. – LPC to 4 UART + 9-bit Protocol
5 URBIRQ_MODE
4 URBIRQ_SHAR
3-0 SELUR2IRQ
F81216AD
R/W 0 0 : PCI IRQ sharing mode.
1 : ISA IRQ sharing mode.
This bit is effective in IRQ sharing mode.
R/W 0 0 : IRQ is not sharing with other device.
1 : IRQ is sharing with other device.
R/W - Select the IRQ channel for UART 2.
This byte is determined by SOUT2/PS_2F8_IRQB or DTR2#/PS_2E0_IRQB.
The power on default is 0x04 if SOUT2/PS_2F8_IRQB or
DTR2#/PS_2E0_IRQB is pull up. Otherwise, it is 0x00.
RS485 Enable Register  Index F0h
Bit
Name
R/W Default
Description
7 9BIT_MODE_URB R/W
6 AUTO_ADDR_URB R/W
5 RTS_Invert
R/W
4 RS485_URB
R/W
3-2 Reserved
R/W
1-0 SELURBCLK1
R/W
SELURBCLK0
0 0: normal UART function
1: enable 9-bit mode (multi-drop mode).
In the 9-bit mode, the parity bit becomes the address/data bit..
0 This bit works only in 9-bit mode.
0: the SM2 bit will be cleared by host, so that data could be received.
1: the SM2 bit will be cleared by hardware according to the sent address and
the given address (or broadcast address derived by SADDR_URB and
SADEN_URB)
0 0: Default non function
1: When RS485_URA set to 1, RTS# signal will be inverted when assert out.
0 0: RS232 mode
1: RS485 mode, which will auto assert RTS# (RTS# is low) when receiving is
required..
0 Dummy Registers
00 00: UART 2 clock source is 1.8462MHz ( 24MHz/13 )
01: UART 2 clock source is 18MHz.
10: UART 2 clock source is 24MHz.
11: UART 2 clock source is 14MHz.
-26-
July, 2008
V0.20P