F81216AD Datasheet, PDF (20/43 Pages) Feature Integration Technology Inc. – LPC to 4 UART + 9-bit Protocol

F81216AD
6. Register Description
Registers are programmed by port 0x4E(0x2E) and 0x4F(0x2F). 0x4E is the index port and 0x4F is the data
port .
RTS1#/PS_CONF_2E
Index Port
Data Port
0 (default)
0x4E
0x4F
1
0x2E
0x2F
To enable configuration registers programming, entry key must output twice to index port continuously. The
entry key is decided by power on setting pins RTS2#/PS_CONF_KEY1 and
RTS3#/PS_CONF_KEY0 as following:
RTS2#/PS_CONF_KEY1
0
0
1
1
RTS3#/PS_CONF_KEY0
0
1
0
1
Entry key
0x77 ( default )
0xA0
0x87
0x67
To exit configuration registers programming, output 0xAA to index port.
Global Control Registers
Register
0x[HEX]
02
Global Control Registers
Register Name
MSB
Software Reset Register
--
07
Logic Device Number Register (LDN)
00
20
Chip ID Register
00
21
Chip ID Register
00
23
Vender ID Register
00
24
Vender ID Register
00
25
Clock Select Register
--
27
Port Select Register
--
“-“ Reserved or Tri-State
Default Value
----
0000
0000
0101
0110
1101
----
- 1/0 - -
LSB
-0
00
10
1/0 0
01
00
-0
1/0 1/0
-17-
July, 2008
V0.20P