F81216AD Datasheet, PDF (19/43 Pages) Feature Integration Technology Inc. – LPC to 4 UART + 9-bit Protocol

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IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IOCHCK#
INTA#
INTB#
INTC#
INTD#
Unassigned
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5.5.3 Stop Frame
After all IRQ/Data Frames have completed, the host controller will terminate SERIRQ by
a Stop frame. Only the host controller can initiate the Stop frame by driving SERIRQ low for 2 or 3
clocks. If the Stop Frame is low for 2 clocks, the next SERIRQ cycle's Sample mode is the Quiet
mode. If the Stop Frame is low for 3 clocks, the next SERIRQ cycle's Sample mode is the
Continuous mode.
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July, 2008
V0.20P