XR16C872 Datasheet, PDF (13/60 Pages) Exar Corporation – DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER

DISCONTINUED
XR16C872
A2 A1 A0
READ MODE
WRITE MODE
Basic Registers (THR/RHR, FCR, IER/ISR, MCR/MSR, LCR/LSR, SPR/FCNT), accessible only when
LCR bit-7 is set to logic 0.
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
1
1
1
Receive Holding Register
Interrupt Enable Register
Interrupt Status Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Scratch Pad Register
FIFO Counter (with FCTR bit-6=1)
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Scratch Pad Register
Baud Rate Registers (DLL, DLM), accessible only when LCR bit-7 is set to a logic 1.
0
0
0
0
0
0
0
0
1
0
0
1
LSB of Divisor Latch
Device Revision (see text)
MSB of Divisor Latch
Device Identification (see text)
LSB of Divisor Latch
MSB of Divisor Latch
Enhanced Registers (TRG, FCTR, EFR, Xon/Xoff 1-2), accessible only when LCR is set to 0xBF.
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
1
1
FIFO Trigger Register
Feature Control Register
Enhanced Feature Register
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
FIFO trigger counter
Feature Control Register
Enhanced Feature Register
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
Enhanced Mode Select Register (EMSR), accessible only when the FCTR bit-6 is set to logic 1.
1
1
1
---
Enhanced Mode Select Register
Table 2, Internal Registers
Rev. 1.00
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