SAP5SD-A-G1-T Datasheet, PDF (25/63 Pages) List of Unclassifed Manufacturers – Universal Actuator-Sensor Interface IC

SAP5S / SAP51
Universal Actuator-Sensor Interface IC
3.3. Firmware Area Programming
In order to program one of the 5-bit cells of the Firmware Area (address 4…8) a special master call according
to Table 10 must be applied, followed by a DEXG or WPAR call immediately. Write access to the Firmware
Area is possible as long as the Lock_EE_PRG flag is not set. The write procedure is started after receipt of
the DEXG/WPAR call. Finish of write procedure may be observed at the status register S0 as described
above.
The analogue circuitry trim information (address 9…11) can be written by special test mode operation only.
There is no possibility to read out the E²PROM data directly. However, AS-i-related configuration data like
ID_Code may be read by the respective Read_ID_Code master request.
Table 10: SAP5 E²PROM - User and Firmware Area Programming
Internal E²PROM Cell Content
E²PROM
Address
Programming Master Calls
0
A4 … A0
1
ID1_Bit3 … ID1_Bit0
2
ID1_Bit3 … ID1_Bit0
3
Not implemented
4
Synchronous_Data_IO
ADRA Master Call
WID1 Master Call
I4
Set ID Code (RDIO) ¹ + DEXG/WPAR ²
ID_Bit3 … ID_Bit0
5
Inhibit_Write_ID1
I3 … I0
I4
Set ID Code 2 (RID1) ¹ + DEXG/WPAR ²
ID2_Bit3 … ID2_Bit0
6
P1_Delay_Activation
I3 … I0
I4
Set IO Config (RDID) ¹ + DEXG/WPAR ²
IO_Bit3 … IO_Bit0
7
Lock_EE_PRG
Delay_Mode
I3 … I0
I4
I3
Set Control Code (RID2) ¹ +
DEXG/WPAR ²
Invert_Data_In
I2
Inhibit_BR01
I1
Inhibit_Watchdog
8
P2_Sync_Activation
Ext_Addr_4I/4O_Mode
I0
I4
Set Control Code 2 (RES) ¹ +
I3
DEXG/WPAR ²
Parallel_Out_4I/4O
I2
Master_Mode
I1
P0_Watchdog_Activation
I0
9
Analogue circuitry trim information
Accessible by ZMDI only
10
11
1 _{according to Table 7}
2 _{according to Table 6 with information bits corresponding to the left-hand column; DEXG if I4=’0’, WPAR if}
I4=‘1’. Note: Differing from regular WPAR/DEXG calls, the slave always returns the received data bits I3…I0.
User Area
Firmware Area
Data Sheet
July 17, 2012
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 3.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
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