M13S32321A_08 Datasheet, PDF (6/50 Pages) Elite Semiconductor Memory Technology Inc. – 256K x 32 Bit x 4 Banks Double Data Rate SDRAM

ESMT
AC Operating Conditions & Timing Specification
M13S32321A
AC Operating Test Conditions
Parameter
Input reference voltage for clock (V_REF)
Input signal maximum peak swing
Input signal minimum slew rate
Input levels (V_IH/V_IL)
Input timing measurement reference level
Output timing reference level
Value
0.5*V_DDQ
1.5
1.0
V_REF+0.45/V_REF-0.45
V_REF
V_TT
Unit
V
V
V/ns
V
V
V
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2008
Revision : 1.1
6/50