M13S32321A_08 Datasheet, PDF (32/50 Pages) Elite Semiconductor Memory Technology Inc. – 256K x 32 Bit x 4 Banks Double Data Rate SDRAM

ESMT
M13S32321A
Current State
CKE CKE
n-1 n
CS
RAS CAS
WE
Add
Action
H X X X X X X INVALID
L H H X X X X Exit Self-Refresh
L H L H H H X Exit Self-Refresh
SELF-REFRESHING*
1
L
H
L
H
H
L
X ILLEGAL
L H L H L X X ILLEGAL
L
H
L
L
X
X
X ILLEGAL
L
L
X
X
X
X
X NOP (Maintain Self-Refresh)
H X X X X X X INVALID
POWER DOWN
L
H
X
X
X
X
X Exit Power Down (Idle after t_PDEX)
L
L
X
X
X
X
X NOP (Maintain Power Down)
H H X X X X X Refer to Function True Table
H
L
L
L
L
H
X Enter Self-Refresh
H L H X X X X Exit Power Down
H
L
L
H
H
H
X Exit Power Down
ALL BANKS IDLE*2
H
L
L
H
H
L
X ILLEGAL
H
L
L
H
L
X
X ILLEGAL
H
L
L
L
X
X
X ILLEGAL
L
L
L
X
X
X
X Refer to Current State = Power Down
H H X X X X X Refer to Function True Table
ANY STATE other
than listed above
ABBREVIATIONS :
H = High Level, L = Low level, V = Valid, X = Don’t Care
Note :
1. CKE Low to High transition will re-enable CLK, CLK and other inputs asynchronously. A minimum setup time must be
satisfied before issuing any command other than EXIT.
2. Power-Down and Self-Refresh can be entered only from All Bank Idle state.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2008
Revision : 1.1
32/50