M13S32321A_08 Datasheet, PDF (38/50 Pages) Elite Semiconductor Memory Technology Inc. – 256K x 32 Bit x 4 Banks Double Data Rate SDRAM

ESMT
Write with Auto Precharge (@BL=8)
M13S32321A
Note 1.
The row active command of the precharge bank can be issued after t_RP from this point.
The new read/write command of another activated bank can be issued from this point.
At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2008
Revision : 1.1
38/50