M12S16161A_07 Datasheet, PDF (11/29 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 16Bit x 2Banks Synchronous DRAM

ESMT
M12S16161A
Single Bit Read-Write-Read Cycle (Same Page) @CAS Latency=3, Burst Length=1
CLOCK
CKE
CS
RAS
CAS
ADDR
BA
tCH
0
1
2
3
4
5
6
tCC
*Note1
tCL
tRAS
tRC
tSH
tRCD
7
8
9
10
11
12
13
14
15
16 17
18 19
HIGH
tSH
tRP
tSS
tSS
tSH
Ra
tSS
*Note2
BS
tSH
tSS
Ca
*Note2,3
BS
tCCD
tSS
Cb
tSH
*Note2,3
BS
Cc
*Note2,3 *Note4
BS BS
Rb
*Note2
BS
A10/AP
Ra
DQ
WE
DQM
*Note 3
tRAC
tSAC
tSLZ
*Note 3
*Note 3 *Note4
Qa
tOH
tSH
Db
tSS
tSH
tSS
tSS
tSH
Rb
Qc
Row Active
Read
Write
Read
Precharge
Row Active
:Don't Care
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.1
11/29