EN27LN51208 Datasheet, PDF (43/46 Pages) Eon Silicon Solution Inc. – 512 Megabit (64 M x 8) SLC, 3.3 V NAND Flash Memory

EN27LN51208
11.12 Data Protection & Power-up sequence
The timing sequence shown in the figure below is necessary for the power-on/off sequence.
The device internal initialization starts after the power supply reaches an appropriate level in the power
on sequence. During the initialization the device R/B# signal indicates the Busy state as shown in the
figure below. In this time period, the acceptable commands are 70h.
The WP# signal is useful for protecting against data corruption at power on/off.
Figure 35. AC Waveforms for Power Transition
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/09/30