EN27LN51208 Datasheet, PDF (10/46 Pages) Eon Silicon Solution Inc. – 512 Megabit (64 M x 8) SLC, 3.3 V NAND Flash Memory

7.4 VALID BLOCK
EN27LN51208
Symbol
Min.
Typ.
Max.
Unit
N_VB
502
-
512
Blocks
Note:
1. The device may include initial invalid blocks when first shipped. The number of valid blocks is
presented as first shipped. Invalid blocks are defined as blocks that contain one or more bad bits
which cause status failure during program and erase operation. Do not erase or program factory-
marked bad blocks. Refer to the attached technical notes for appropriate management of initial
invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block at the time of
shipment and is guaranteed to be a valid block up to 1K program/erase cycles with 4bit/512Byte
ECC.
7.5 AC TEST CONDITION
(T_A = 0 to 70°C, V_CC=2.7V~3.6V, unless otherwise noted)
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load ⁽¹⁾
Condition
0V to V_CC
5 ns
V_CC /2
1 TTL Gate and C_L=50pF
Note:
1. Refer to 11.10 Ready/Busy#, R/B# output’s Busy to Ready time is decided by the pull-up resistor (Rp)
tied to the R/B# pin.
7.6 CAPACITANCE
(T_A = 25°C, V_CC=3.3V, f =1.0MHz)
Item
Symbol
Test Condition
Input / Output Capacitance
C_I/O
V_IL = 0V
Input Capacitance
C_IN
V_IN = 0V
Note: Capacitance is periodically sampled and not 100% tested.
Min.
-
-
Max.
Unit
8
pF
8
pF
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/09/30