EN27LN51208 Datasheet, PDF (41/46 Pages) Eon Silicon Solution Inc. – 512 Megabit (64 M x 8) SLC, 3.3 V NAND Flash Memory

EN27LN51208
Figure 33. Read Operation with Cache Read
11.11 Ready/Busy#
The device has a R/B# output that provides a hardware method of indicating the completion of a page
program, erase and random read completion. The R/B# pin is normally high but transition to low after
program or erase command is written to the command register or random read is started after address
loading. It returns to high when the internal controller has finished the operation. The pin is an open-
drain driver thereby allowing two or more R/B# outputs to be Or-tied. Because pull-up resistor value is
related to tr (R/B#) and current drain during busy (ibusy), an appropriate value can be obtained with the
following reference chart (Fig. 34). Its value can be determined by the following guidance.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/09/30