EN27LN51208 Datasheet, PDF (11/46 Pages) Eon Silicon Solution Inc. – 512 Megabit (64 M x 8) SLC, 3.3 V NAND Flash Memory

7.7 MODE SELECTION
EN27LN51208
CLE
ALE
CE#
WE#
RE#
WP#
Mode
H
L
L
Rising
H
L
H
L
Rising
H
X
Command Input
Read Mode
X
Address Input (5 clock)
H
L
L
Rising
H
L
H
L
Rising
H
H
Command Input
Write Mode
H
Address Input (5 clock)
L
L
L
Rising
H
H
Data Input
L
L
L
H
Falling
X
Data Output
X
X
X
X
H
X
During Read (Busy)
X
X
X
X
X
H
During Program (Busy)
X
X
X
X
X
H
During Erase (Busy)
X
X ⁽¹⁾
X
X
X
L
Write Protect
X
X
H
X
X
0V/V_CC ⁽²⁾ Stand-by
Note:
1. X can be V_IL or V_IH.
2. WP# should be biased to CMOS high or CMOS low for stand-by.
7.8 Program / Erase Characteristics
(T =0 to 75℃, Vcc=2.7V ~ 3.6V)
A
Parameter
Symbol
Min.
Typ.
Max.
Unit
Average Program Time
Dummy Busy Time for Cache
Program
t_PROG
t_CBSY
-
300
750
us
-
3
750
us
Number of Partial Program Cycles
in the Same Page
N_OP
-
-
4
cycle
Block Erase Time
Dummy Busy Time for Two-Plane
Page Program
t_BERS
T_DBSY
-
3
10
ms
-
0.5
1
us
Note:
1. Typical program time is defined as the time within which more than 50% of the whole pages are
programmed at 3.3V V_CC and 25°C temperature.
2. tPROG is the average program time of all pages. Users should be noted that the program
time variation from page to page is possible.
3. Max. time of t_CBSY depends on timing between internal program completion and data in.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/09/30