EN27LN51208 Datasheet, PDF (35/46 Pages) Eon Silicon Solution Inc. – 512 Megabit (64 M x 8) SLC, 3.3 V NAND Flash Memory

11.3 Cache Program
EN27LN51208
Cache Program is an extension of Page Program, which is executed with 2,112 byte (x8) or 1,056
words (x16) data registers, and is available only within a block. Since the device has 1 page of cache
memory, serial data input may be executed while data stored in data register are programmed into
memory cell.
After writing the first set of data up to 2,112 bytes (x8) or 1,056 words (x16) into the selected cache
registers, Cache Program command (15h) instead of actual Page Program (10h) is inputted to make
cache registers free and to start internal program operation. To transfer data from cache registers to
data registers, the device remains in Busy state for a short period of time (t ) and has its cache
CBSY
registers ready for the next data-input while the internal programming gets started with the data loaded
into data registers. Read Status command (70h) may be issued to find out when cache registers
become ready by polling the Cache-Busy status bit (I/O6). Pass/fail status of only the previous page is
available upon the return to Ready state. When the next set of data is inputted with the Cache Program
command, t is affected by the progress of pending internal programming. The programming of the
CBSY
cache registers is initiated only when the pending program cycle is finished and the data registers are
available for the transfer of data from cache registers. The status bit (I/O5) for internal Ready/Busy may
be polled to identity the completion of internal programming. If the system monitors the progress of
programming only with R/B#, the last page of the target programming sequence must be programmed
with actual Page Program command (10h).
Cache Program (available only within a block)
Figure 27. Cache Program
Note:
1. Since programming the last page does not employ caching, the program time has to be that of
Page Program. However, if the previous program cycle with the cache data has not finished, the
actual program cycle of the last page is initiated only after completion of the previous cycle, which
can be expressed as the following formula.
2. t = Program time for the last page + Program time for the (last-1)th page – (Program command
PROG
cycle time + Last page data loading time)
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/09/30